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Appendix A

Hardware Specifications


General
Protocols
Host Interface
H.100 Compliant Interface
Environment
Power Requirements
CEPT E1 G.703 Telephony Interface
DSX-1 Telephony Interface
Interoperability With MVIP-90
Connecting to the MVIP-90 Bus
Compliance and Regulatory Certification

General
Board Capacity

· AG Quad T: 4 T1 (DSX-1) termination; 96 call control ports, 60 ports voice processing

· AG Quad E 120 Ohm: 4 CEPT E1 termination; 120 call control ports, 60 ports voice processing

· AG Quad E 75 Ohm: 4 CEPT E1 termination; 120 call control ports, 60 ports voice processing

· AG Dual T: 2 T1 (DSX-1) termination; 48 call control ports, 60 ports voice processing

· AG Dual E 120 Ohm: 2 CEPT E1 termination; 60 call control ports, 60 ports voice processing

· AG Dual E 75 Ohm: 2 CEPT E1 termination; 60 call control ports, 60 ports voice processing

· Quad Connect T: 4 T1 (DSX-1) termination

· Quad Connect E 120 Ohm : 4 CEPT E1 termination

· Quad Connect E 75 Ohm: 4 CEPT E1 termination

TDM Bus

Features one complete H.100 bus interface and optional MVIP-90 interface with MVIP-95 enhanced-compliant switching.

DSP Processing Power

8 Texas Instruments TMS320C51 DSPs at 50 MIPS each

1 Texas Instruments TMS320C548 DSP at 50 MIPS

Microprocessor

One 25 MHz 80486 compatible embedded processor

Software Development Kits

Natural Access for Windows NT, UnixWare, and Solaris

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ProtocolsTop of Page

Host Interface
Feature

Specification

Electrical

PCI bus designed to PCI local bus specification revision 2.1

Mechanical

Designed to the PCI local bus specification revision 2.1 for a long expansion card (physical dimensions 4.2 x 12.283 in.)

Bus Speed

DC to 33 MHz

Max Number of Boards per System

16

Max Number of Ports per System

Limited by host processor resources

Memory Mapped

Memory mapped interface for efficient block data transfers

Addresses/Interrupts

Address and interrupts automatically configured by PCI BIOS (no jumpers or switches)

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H.100 Compliant InterfaceTop of Page

Environment
Feature

Description

Operating Temperature

0 to 50 degC

Storage Temperature

-20 to 70 degC

Humidity

5 to 80%, non-condensing

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Power RequirementsTop of Page

Max 2.5 Amps at +5V on PCI bus

CEPT E1 G.703 Telephony InterfaceTop of Page

Interface

G.703 2048 Kbps trunk interface

Framing

CEPT G.703/G.704 Channel Associated Signaling

Signaling Capabilities

ABCD bits for Channel Associated Signaling and HDLC/LAPD for generating/terminating data link

Line Code

HDB3 (in zero code suppression) or AMI

Alarm Signal Capabilities

Loss of Frame Alignment (OOF), Loss of Signaling Multiframe Alignment and Loss of CRC Multiframe Alignment (red), Remote Alarm and Remote Multiframe Alarm (yellow), Alarm Indication Signal (AIS) (blue)

Counts

Bit error rate, CRC errors, slips, line code violations, far-end block errors

Loopback

Per channel and across channels under software control

Connectors

Four or two 75 Ohm RJ48C connectors or four or two 120 Ohm RJ48C connectors

DSX-1 Telephony Interface
Interface

ANSI T1.102, T1.403

Framing

D4, ESF

Signaling Capabilities

ABCD bits for Channel Associated Signaling and HDLC/LAPD for generating/terminating data link

Line Codes

AMI or selectable B8ZS, jammed bit (ZCS) or no zero code suppression

Alarm Signal Capabilities

Yellow, Red, and Blue

Counts

Bipolar violation, F(t) error, and CRC error

Robbed bit

Selectable on a per-trunk basis

Loopback

Per channel and overall under software control. Automatic remote loopback with CSU option.

Connectors

Four or two RJ48C connectors

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Interoperability With MVIP-90Top of Page

The AG Quad board is located in a PCI bus slot and connects to the H.100 telephony bus. MVIP-90 and H-MVIP boards connect to the MVIP-90 bus and are typically located in ISA bus slots.

The MVIP Bus Adapter is an adapter which connects the H.100 bus to the
MVIP-90 bus located in the same computer chassis as shown in
Figure 29.


appa0.gif

Figure 29. H.100 Bus Interoperability with MVIP-90 Bus


The MVIP Bus Adapter allows boards connected to the H.100 bus to access the MVIP-90 bus, and allows MVIP-90 boards to access the first 16 streams of the H.100 bus. When connecting H.100 boards to the adapter, configure the first 16 H.100 streams in MVIP-90 mode.

The H.100 streams running in MVIP-90 mode are clocked at 2 MHz. Each stream has 32 timeslots. By default, the AG Quad board is configured for MVIP-90 compatibility mode with the first 16 streams configured for 2 MHz.


appa1.gif

Figure 30. MVIP Bus Adapter Streams

Connecting to the MVIP-90 BusTop of Page

The MVIP Bus Adapter is an adapter that connects the H.100 bus to the MVIP-90 bus. This allows boards connected to the H.100 bus to access the MVIP-90 bus, and allows MVIP-90 boards to access the first 16 streams of the H.100 bus. When connecting to the MVIP Bus Adapter, the first 16 streams of the H.100 bus must be configured to run in MVIP-90 mode (clocked at 2 MHz).

The MVIP Bus Adapter (shown in Figure 31) contains a connector to an H.100 board (such as the AG Quad) and the MVIP-90 bus.


appa2.gif

Figure 31. MVIP Bus Adapter


If your system contains an AG Quad board and MVIP-90 boards, you must use the MVIP Bus Adapter. The MVIP Bus Adapter connects the MVIP-90 bus to the H.100 bus as shown in Figure 32. Only one MVIP Bus Adapter is required in a system.


appa3.gif

Figure 32. Connecting to the MVIP-90 Bus


To connect the MVIP Bus Adapter, refer to Figure 33 and follow this procedure:

  1. Connect the right angle connector (JP1) on the MVIP Bus Adapter to the connector (JP6) on the AG Quad board.

    
    
  2. Support the MVIP Bus Adapter by connecting the threaded mounting piece to the MVIP Bus Adapter and the AG Quad board using two #4 screws.

    
    
  3. If you have multiple H.100 boards, connect the H.100 bus cable to the AG Quad board and to each of the other H.100 boards.

    
    
  4. Connect the MVIP-90 bus cable to the connector on the MVIP Bus Adapter.


appa4.gif


Figure 33. MVIP Bus Adapter Assembly

Compliance and Regulatory CertificationTop of Page

Natural MicroSystems obtains board-level approvals certificates for supported countries. In addition to the approval obtained by NMS for the board and its associated software, some countries require a system level approval before connecting the system to the public network. To learn what approvals you require, contact the appropriate regulatory authority in the target country.
T1 Version

EMC

US

Canada

FCC Part 15, Subpart J, Class A (with shielded cables)

IECS-003

Safety

US

Canada

NRTL recognized to UL 1950 3rd edition

NRTL recognized to CSA C22.2 No. 950

Telecom

US

Canada

FCC Part 68

ISC CS-03

E1 Version

EMC

EU countries

EN55022: 1994

· 75 Ohm version: Class B (with shielded cable)

· 120 Ohm version: Class B (with shielded cable)

EN55024: 1998

Australia

AS/NZS 3548

Safety

EU countries

EN60950: (1992 + Amendments 1 to 4)

UK

BABT AN-48: Issue 5

Australia

TS 001 (1997)

AS/NZS3260 (1993)

Telecom

EU countries

CTR4 (ISDN PRI)

CTR12 (E1 120 Ohm)

UK

NTR4 (E1 75 Ohm)

Italy

Poland

Russia

Sweden

National CAS (75 Ohm)

ISDN (only on AG Quad E1 120 Ohm)

CAS R1.5 (120 Ohm)

P7/P8 CAS (75 Ohm and 120 Ohm)

Other countries

Refer to the NMS web site (www.nmss.com)



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