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Chapter 5

AG Quad Switching


5.1 Introduction
5.2 AG Quad Switch Model
5.2.1 HMIC Switch Blocking
5.2.2 Switching Restrictions
Defining H.100 Bus Streams
Conflict When Using H.100 to H.100 Bus Connections
Blocking Conditions for 2Mhz and 4Mhz H.100 Streams
Blocking Conditions for 8Mhz H.100 Streams
5.3 T1 Trunk Channels and H.100 Timeslots
5.3.1 T1 Channels and Timeslots for Channel Associated Signaling
5.3.2 T1 Channels and Timeslots for Common Channel Signaling
5.3.3 T1 Channels and Timeslots for RAW Mode
5.4 E1 Trunk Channels and Timeslots
5.4.1 E1 Signaling for Channel Associated Signaling
5.4.2 E1 Signaling and Timeslots for Common Channel Signaling
5.4.3 E1 Channels and Timeslots for RAW Mode
5.5 Default Connections for Standalone Board

5.1 IntroductionTop of Page

This chapter describes:

Refer to Getting Started With MVIP Switching for more information about switching.

The AG Quad board is shown in the example to define the switch model and trunk interfaces. For the dual variant of the AG Quad board, ignore references to trunks 3 and 4.

5.2 AG Quad Switch ModelTop of Page

Figure 21 shows the AG Quad board switch model. The specific use of each stream is as follows:
H.100 Streams

H.100 Bus

Streams 0..31, timeslots vary based on clock rate:

Streams clocked at 8 MHz: timeslots 0..127

Streams clocked at 4 MHz: timeslots 0..63

Streams clocked at 2 MHz: timeslots 0..31

Local Streams

Trunk voice information

Trunk 1: Streams 0 and 1, timeslots 0..23 (or 29)

Trunk 2: Streams 4 and 5, timeslots 0..23 (or 29)

Trunk 3: Streams 8 and 9, timeslots 0..23 (or 29)

Trunk 4: Streams 12 and 13, timeslots 0..23 (or 29)

(With AG Quad T boards, timeslots 0..23 are present. With AG Quad E boards, timeslots 0..29 are present.)

Trunk signaling information

Trunk 1: Streams 2 and 3

Trunk 2: Streams 6 and 7

Trunk 3: Streams10 and 11

Trunk 4: Streams 14 and 15

The timeslots used for the signaling information depend on the board type (T1 or E1) and the board configuration (NetworkInterface.T1E1[x].SignalingType). For more information, refer to Section 5.3, T1 Trunk Channels and H.100 Timeslots.

DSP voice information

Streams 16 and 17, timeslots 0..127

DSP signaling information

Streams 18 and 19, timeslots 0..127

HDLC controllers

Trunk 1: Streams 20 and 21

Trunk 2: Streams 22 and 23

Trunk 3: Streams 24 and 25

Trunk 4: Streams 26 and 27

A switch connection must be made to connect the appropriate signaling stream to the HDLC controller.


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Figure 21. AG Quad Switch Model

5.2.1 HMIC Switch BlockingTop of Page

The AG Quad board switching is implemented by the HMIC chip. The HMIC can perform local bus to local bus switching in full non-blocking fashion.

The number of H.100 connections is limited to a maximum of 128 full duplex or 256 simplex connections, in any combination, from either:

It is possible to mix the two types.

5.2.2 Switching RestrictionsTop of Page

Quad boards with version numbers earlier than Revision C have additional blocking conditions. These blocking conditions are described in this section. These blocking conditions do NOT apply to boards that have the Lucent T8100 switch.

Defining H.100 Bus StreamsTop of Page

H.100 bus streams are defined in pairs. An even numbered stream n has a corresponding odd numbered stream n+1. H.100 to H.100 bus connections cannot be made within the same pair. For example, a switch connection cannot be made between timeslots on streams 0 and 1.

Conflict When Using H.100 to H.100 Bus ConnectionsTop of Page

H.100 to H.100 connections can potentially cause blocking conflicts with Local-to-H.100 or H.100-to-Local connections if:

The connection points (from or to) are on the same H.100 stream

AND

The connection points (from or to) are separated by less than three timeslots.

For example, the connection LOCAL:0:0 to H100:0:2 will block the connection H100:0:1 to H100:2:10.

Blocking Conditions for 2Mhz and 4Mhz H.100 StreamsTop of Page

Timeslots are paired. If a given timeslot on an even numbered stream is in one direction, then the same timeslot on the corresponding odd numbered stream must be in the opposite direction.

For example, if stream 0 timeslot 5 is an input, then stream 1 timeslot 5 cannot be an input and must be either disabled or an output.

Blocking Conditions for 8Mhz H.100 StreamsTop of Page

Streams are paired. All the timeslots in an H.100 stream must be connected in the same direction. For example, if stream 0 timeslot 0 is an output, then all timeslots on stream 0 must be either disabled or outputs. This also implies that every timeslot on stream 1 must be disabled or an input.

Note: Due to these switching restrictions, NMS recommends that, if possible, use the 2Mhz and 4Mhz stream speed for the initial application development.

5.3 T1 Trunk Channels and H.100 TimeslotsTop of Page

AG Quad T boards place the voice and signaling information from the T1 trunk in timeslots in local streams. The actual timeslots used depend upon how you have configured the board (NetworkInterface.T1E1[x].SignalingType). For more information, refer to Chapter 6.

5.3.1 T1 Channels and Timeslots for Channel Associated SignalingTop of Page

If NetworkInterface.T1E1[x].SignalingType = CAS (its default setting), information is routed to accommodate a T1 channel associated signaling configuration, where:

On the local bus, this information is presented as follows:

  • Signaling information from each channel is placed in a corresponding timeslot on the local bus in the following streams:

    
    -	 Trunk 1 - stream 2 and stream 3

    - Trunk 2 - stream 6 and stream 7

    - Trunk 3 - stream 10 and stream 11

    • Trunk 4 - stream 14 and stream 15

      
      
      chap50.gif
      Figure 22. Connecting T1 Timeslots (CAS Mode)

    • 5.3.2 T1 Channels and Timeslots for Common Channel SignalingTop of Page

      If NetworkInterface.T1E1[x].SignalingType = PRI, signaling information is routed to accommodate the T1 common channel signaling configuration, where:

      This configuration is typically used in ISDN applications for trunks carrying the D channel.

      The AG Quad T board routes this information as follows:

    • All signaling information from channel 23 (the D channel) is placed on the local bus in timeslot 0 in the following streams:

      
      -	 Trunk 1 - stream 2 and stream 3

      - Trunk 2 - stream 6 and stream 7

      - Trunk 3 - stream 10 and stream 11

      • Trunk 4 - stream 14 and stream 15

        
        Switch connections should be made to connect these streams to the HDLC controllers, which process the D channel information from each frame.

        chap51.gif
        Figure 23. Connecting T1 Timeslots (PRI Mode)

      • 5.3.3 T1 Channels and Timeslots for RAW ModeTop of Page

        If NetworkInterface.T1E1[x].SignalingType = RAW, information is routed to accommodate a configuration where no D channel is present on the T1 trunk (refer to Appendix C):

        This configuration is typically used in Non-Facility Associated Signaling (NFAS) configurations.

        The AG Quad T board routes this information as follows (see Figure 24):

      • Any signaling information is ignored.

        
        
        chap54.gif
        Figure 24. Connecting T1 Timeslots (RAW Mode)

      • 5.4 E1 Trunk Channels and TimeslotsTop of Page

        For NetworkInterface.T1E1[x].SignalingType = CAS or = PRI, the AG Quad E board routes the voice information as follows:

        Figure 25 illustrates how voice channel data is assigned to timeslots:


        chap52.gif

        Figure 25. Connecting E1 B Channels to Timeslots

        5.4.1 E1 Signaling for Channel Associated SignalingTop of Page

        If NetworkInterface.T1E1[x].SignalingType = CAS (the default setting), signaling information is routed to accommodate an E1 channel associated signaling configuration, where E1 channel 16 carries signaling information for all other channels. The signaling information is broken out and placed on the corresponding signaling stream for that trunk. The signaling information is in the following streams:

        - Trunk 1 - stream 2 and stream 3

        - Trunk 2 - stream 6 and stream 7

        - Trunk 3 - stream 10 and stream 11

        The signaling information is placed in the same timeslot number as the voice information for that channel.

        Figure 26 illustrates how signaling data is distributed:


        chap53.gif

        Figure 26. Breaking Out Signaling Information From E1 Stream 16 (CAS Mode)

        5.4.2 E1 Signaling and Timeslots for Common Channel SignalingTop of Page

        If NetworkInterface.T1E1[x].SignalingType = PRI, signaling information is routed differently to accommodate an ISDN common channel signaling configuration, where CCS signaling packets are transmitted in channel 16 instead of CAS bits. All signaling information from channel 16 is placed directly into timeslot 0:

        - Trunk 1 - stream 2 and stream 3

        - Trunk 2 - stream 6 and stream 7

        - Trunk 3 - stream 10 and stream 11

        Switch connections must be made to connect these streams to the HDLC controllers, which process the D channel information from each frame.


        chap55.gif

        Figure 27. Routing E1 Stream 16 Data To HDLC Controller (PRI Mode)

        5.4.3 E1 Channels and Timeslots for RAW ModeTop of Page

        If NetworkInterface.T1E1[x].SignalingType is set to RAW:

        The AG Quad E board routes this information as follows (see Figure 28):

      • Any signaling information is ignored.

        
        
        chap57.gif
        Figure 28. Connecting E1 Timeslots (RAW Mode)

      • 5.5 Default Connections for Standalone BoardTop of Page

        If a board is configured for standalone operation (Clocking.HBus.ClockMode = STANDALONE), the DSPs and trunks are connected as shown in the following tables. The exact settings depend upon the setting of NetworkInterface.T1E1[x].SignalingType, as shown below:
        Setting

        Default Routing for AG Quad T Board

        CAS

        Full duplex connection between trunk voice information and DSP resources:

        Trunk 1: 0:0..23 => 17:0..23, 16:0..23 => 1:0..23

        Trunk 2: 4:0..23 => 17:24..47, 16:24..47 => 5:0..23

        Trunk 3: 8:0..23 => 17:48..71, 16:48..71 => 9:0..23

        Trunk 4: 12:0..23 => 17:72..95, 16:72..95 => 13:0..23

        Full duplex connection between trunk signaling information and DSP resources:

        Trunk 1: 2:0..23 => 19:0..23, 18:0..23 => 3:0..23

        Trunk 2: 6:0..23 => 19:24..47, 18:24..47 => 7:0..23

        Trunk 3: 10:0..23 => 19:48..71, 18:48..71 => 11:0..23

        Trunk 4: 14:0..23 => 19:72..95, 18:72..95 => 15:0..23

        PRI

        Full duplex connection between trunk voice information and DSP resources:

        Trunk 1: 0:0..22 => 17:0..22, 16:0..22 => 1:0..22

        Trunk 2: 4:0..22 => 17:24..46, 16:24..46 => 5:0..22

        Trunk 3: 8:0..22 => 17:48..70, 16:48..70 => 9:0..22

        Trunk 4: 12:0..22 => 17:72..94, 16:72..94 => 13:0..22

        Note: Timeslots 23, 47, 71, and 95 are unused on streams 16 and 17.

        Full duplex connection between HDLC controller and the signaling streams. This is done because the runfile can only access information on these streams:

        Trunk 1: 2:0 => 21:0, 20:0 => 3:0

        Trunk 2: 6:0 => 23:0, 22:0 => 7:0

        Trunk 3: 10:0 => 25:0, 24:0 => 11:0

        Trunk 4: 14:0 => 27:0, 26:0 => 15:0.

        RAW

        Full duplex connection between trunk voice information and DSP resources:

        Trunk 1: 0:0..23 => 17:0..23, 16:0..23 => 1:0..23

        Trunk 2: 4:0..23 => 17:24..47, 16:24..47 => 5:0..23

        Trunk 3: 8:0..23 => 17:48..71, 16:48..71 => 9:0..23

        Trunk 4: 12:0..23 => 17:72..95, 16:72..95 => 13:0..23

        Setting

        Default Routing for AG Quad E Board

        CAS

        Full duplex connection between trunk voice information and DSP resources:

        Trunk 1: 0:0..29 => 17:0..29, 16:0..29 => 1:0..29

        Trunk 2: 4:0..29 => 17:30..59, 16:30..59 => 5:0..29

        Trunk 3: 8:0..29 => 17:60..89, 16:60..89 => 9:0..29

        Trunk 4: 12:0..29 => 17:90..119, 16:90..119 => 13:0..29

        Full duplex connection between trunk signaling information and DSP resources:

        Trunk 1: 2:0..29 => 19:0..29, 18:0..29 => 3:0..29

        Trunk 2: 6:0..29 => 19:30..59, 18:30..59 => 7:0..29

        Trunk 3: 10:0..29 => 19:60..89, 18:60..89 =>11:0..29

        Trunk 4: 14:0..29 => 19:90..119, 18:90..119 => 15:0..29

        PRI

        Full duplex connection between the trunk voice information and DSP resources:

        Trunk 1: 0:0..29 => 17:0..29, 16:0..29 => 1:0..29

        Trunk 2: 4:0..29 => 17:30..59, 16:30..59 => 5:0..29

        Trunk 3: 8:0..29 => 17:60..89, 16:60..89 => 9:0..29

        Trunk 4: 12:0..29 => 17:90..119, 16:90..119 => 13:0..29

        Full duplex connection between HDLC controller and the signaling streams. This is done because the runfile can only access information on these streams:

        Trunk 1: 2:0 => 21:0, 20:0 => 3:0

        Trunk 2: 6:0 => 23:0, 22:0 => 7:0

        Trunk 3: 10:0 => 25:0, 24:0 => 11:0

        Trunk 4: 14:0 => 27:0, 26:0 => 15:0.

        RAW

        Full duplex connection between trunk voice information and DSP resources:

        Trunk 1: 0:0..30 => 17:0..30, 16:0..30 => 1:0..30

        Trunk 2: 4:0..30 => 17:31..61, 16:31..61 => 5:0..30

        Trunk 3: 8:0..30 => 17:62..92, 16:62..92 => 9:0..30

        Trunk 4: 12:0..30 => 17:93..123, 16:93..123 => 13:0..30

        You may wish to change this default routing so the board can interoperate with other boards connected to it over the H.100 bus. To do so, disable the automatic routing by setting SwitchConnections = NO.

        When the bus is enabled (Clocking.HBus.ClockMode is not equal to STANDALONE), there is no default routing, unless you set SwitchConnections = YES.



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