(Page 1 of 5 in this chapter)


Chapter 4

MVIP Clocking


4.1 Introduction
4.1.1 Telephony Bus Signals
4.2 Single Chassis Clock Configuration
4.2.1 H.100 Clock Configuration
4.2.2 MVIP-90 and H-MVIP Clock Configuration
4.3 Bus Clocking Fallback Behavior
4.3.1 H.100 Bus Primary Reference Trunk Failure
4.3.2 MVIP-90 and H-MVIP Bus Primary Reference Trunk Failure
4.4 Multi-Chassis Clock Configuration
4.4.1 MC1 Bus and MVIP Bus Clock Interaction


(Page 1 of 5 in this chapter)


tech_support@nmss.com
Copyright © 1997, Natural MicroSystems, Inc. All rights reserved.