- The boards in an MVIP system are synchronized via clocks. In a system, one board drives the bus clock signals. All other boards reference their clocks from the bus.
- On the MVIP-90 bus and on the H.100 bus, the board that drives the bus clocks is the MVIP clock master. In a digital system, the MVIP clock master derives the bus clock signals from the digital trunk's high-quality timing references. In an analog system with no digital telephone network interfaces, a board is configured as the MVIP bus clock master using the on-board oscillator to drive the clock signals.
- If the system contains both MVIP-90 boards and H.100 boards, it is recommended that one of the H.100 boards be configured as the clock master.
- Both the MVIP-90 bus and the H.100 bus have a secondary clock signal which can be configured as a backup clock reference. On the MVIP-90 bus, this clock signal is SEC8K. On the H.100 bus, this clock signal is CT_NETREF.
- In a multi-chassis MVIP system, all the boards in the PC chassis must be driven by the same clock source. One MC1 board in the system must be configured as the MC1 clock master, driving the MC1 clock signals. The MC1 boards in each PC chassis are then configured to drive the MVIP bus in their chassis.
- The Switching service provides functions to allow you to control the clocks on the underlying MVIP switching device. If provides functions for configuring the:
- Secondary clock signal on the bus.
- Clocking for an MC1 system.
- The following table lists when to use the clock configuration functions available in the Switching service:
- Refer to the Getting Started With MVIP Switching Manual for more information about clocking.
- Presented here are two examples of clock configuration. The first example uses swiConfigBoardClock and swiConfigSec8KClock on AG-T1 boards. The second example uses swiConfigBoardClock and swiConfig8KRefClock on MC1 boards.
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