- The CPI library was designed to facilitate development of applications over the TX Series of boards from Natural MicroSystems. This library gives developers a consistent communications mechanism to the TX Series board, regardless of the operating system employed on the host (Windows NT, UnixWare, Solaris).
- The basic unit of communication to the boards is a channel. The channel mechanism provides a multiplexing/de-multiplexing packet based interface between the host operating system and one or more TX Series boards. The combination of board # (or CP#) and channel is known a logical port.
- In order to implement this multiplexing and de-multiplexing, a six byte header is used on all packets between the PC and the TX Series boards.
- Communications processors (TX Series devices) are numbered from 1-8. The PC is assigned a CP # of 0. The length field indicates the length of the entire data packet (including the 6 byte header). Channel numbers are numbered from 0-255 (Channel 0 is reserved).
- Typically a particular channel # is assigned to a task on the TX Series board by prior arrangement. This is similar to the well known ports concept used in TCP/UDP. The Host based application is free to use any unused channel on the host side. This provides the application programmer up to 255 channels for each TX Series board.
- This communications mechanism is in fact vary similar in function to UDP datagrams. Tasks on the TX Series board register to receive all data from a particular well know channel. Host applications pick an unused channel they wish to use and register to receive all packets on the chosen channel. Communications are accomplished via a connectionless datagram type of service. Due to the nature of such a service, most Tasks on the TX Series board respond to requests from the Host application with a response indicating success or failure of the request. This response is at the application level, not at the CPI layer.
- The following list displays well known channels used by tasks on the TX Series board; These channels are defined in the file dpriface.h.
#define PT_NBX 0x01 /* NetBios to X25 Task */
#define PT_HIP 0x02 /* Host IP Access Task */
#define PT_FILEMNGR 0x03 /* File Manager Task */
#define PT_X25 0x04 /* Board to Board X25 */
#define PT_NETMNGR 0x05 /* Network Manager Task */
#define PT_CONSOLE 0x06 /* Console Task */
#define PT_LOADER 0x07 /* Loader Task */
#define PT_DEBUG 0x08 /* Debug Task */
#define PT_MVIP 0x09 /* MVIP Control Task */
#define PT_T1E1C 0x0a /* T1/E1 Control Task */
#define PT_T1E1S 0x0b /* T1/E1 Status Task */
#define PT_INF 0x0c /* Alarm Mgr raw alarms */
#define PT_VPD 0x0d /* Virtual Port Driver */
#define PT_ICMP 0x0e /* ICMP Protocol Task */
#define PT_SS7 0x0f /* SS7 API port */
#define PT_RTCP 0x10 /* RTCP Control Task */
#define PT_RTP 0x11 /* RTP Control Task */
#define PT_ARP 0x12 /* ARP Protocol Task */
#define PT_ISUP 0x14 /* ISUP Protocol Task */
#define PT_MTP 0x15 /* MTP Protocol Task */
#define PT_TCAP 0x17 /* TCAP Protocol Task */
#define PT_TUP 0x1d /* TUP Protocol Task */
#define PT_SCCP 0x1e /* SCCP Protocol Task */
#define PT_RMTDPR 0x1f /* Remote DPR control */
Note: Many times NMS-developed host applications tend to use the same port # on the host side that is used on the TX Series board side. For example, the Ethernet NIC driver software on the host uses Port # 0x02 on the host. This makes this port unavailable to other applications on the host. In general, Natural MicroSystems suggests that host application programmers use ports 33-255 in order to minimize any such conflicts.
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Note: Always use the compile option `Structure Packing' when compiling source code using these libraries and APIs.