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Chapter 5

Using MVIP Switching

5.1 Introduction
5.2 Using MVIP Switching
5.3 Using the MVIP-90 Switch Model
5.4 Using the MVIP-95 Switch Model
5.5 Hybrids and Timeslots on the Local Bus
5.6 Default Connections
5.7 FMIC-Based Switching Restrictions
5.7.1 Local Switching Restrictions
5.8 Multi-Chassis Switching

5.1 Introduction

AG-8 and AG-8/80 boards are MVIP-90-compliant boards that can be connected to the MVIP-90 telephony bus to share data and functionality with other boards connected to the same bus. AG-8 and AG-8/80 boards can also be used in multi-chassis configurations that join several PC chassis over an MC1 bus.

This chapter describes the two MVIP switch block models, and shows how to use MVIP switching with AG-8 and AG-8/80 boards.

CT Access applications can use either the MVIP-90 or the MVIP-95 switch block model to address streams and timeslots. A switch block model is a logical model for addressing streams and timeslots that correspond to physical wires in a bus cable. Using a switch model enables application code to be hardware-independent when it runs on hardware that complies with the switch model.

This chapter assumes the user has a basic knowledge of time division multiplexing (TDM) architecture using streams and timeslots. For more information about switching and time-division-multiplexing, refer to Getting Started With MVIP Switching. For more information about multi-chassis configurations, refer to the MC1 Installation and Developer's Manual.

Note: We strongly recommend using the MVIP-95 switch model to develop new applications. The MVIP-95 model provides forward compatibility for the H.100 telephony bus, and is designed to accommodate further telephony bus evolution.

5.2 Using MVIP Switching

MVIP connectivity is enabled with the EnableMVIP=YES statement in the ag.cfg file. When MVIP connectivity is enabled, DSP resources and network interfaces on one board can be connected over the MVIP bus to DSP resources and network interfaces on other boards. Applications address the switch block by using a switch block model.

The CT Access Switching service can use either MVIP-90 or MVIP-95 switch block models. You can also use the MVIPSlot statement in the ag.cfg file to nail up connections from DSP resources to the telephony bus, but you can only use the MVIP-90 switch block model at that level. You must use the CT Access Switching service if you want to use the MVIP-95 switch block model.

Switching on AG-8 and AG-8/80 boards is implemented by the FMIC chip. A standard MVIP driver is provided with the AG runtime software.

5.3 Using the MVIP-90 Switch Model

The MVIP-90 bus has 16 physical wires, which are labeled DSi0..7 and DSo0..7 in the MVIP-90 switch model. In the MVIP-90 switch model, applications address the 16 MVIP bus wires as streams 0..15.

The MVIP-90 switch model is designed to facilitate full-duplex connections between DSP resources and network interfaces that reside on different boards.

To make a full duplex connection between a DSP resource and a network interface, connect:

By convention, even-numbered streams are used for voice information and
odd-numbered streams are used for signaling information. Network interface boards receive input from timeslots on DSo streams and send output to timeslots on DSi streams.

Each MVIP bus wire (DSo or DSi) is labeled differently on the input side and the output side of the switch block, as shown in Figure 12. On the input side, the DSo0..7 wires are addressed as streams 0..7 and DSi0..7 as streams 8..15. On the output side, the same DSi0..7 wires are addressed as streams 0..7 and DSo0..7 as streams 8..15.

Figure 12. MVIP Streams and MVIP Bus Wires



Local resources (such as network interfaces and DSP resources) are also connected to the switch block. Local resources are located on streams starting at 16.


 



For AG-8 and AG-8/80 boards:




Figure 13 shows the complete MVIP-90 switch model:


 



Figure 13.	 MVIP-90 Switch Model for AG-8 and AG-8/80 Boards




The stream number used in a switching command designates a specific physical wire. The actual physical wire that is assigned to the stream number depends on whether the stream is providing input to the switch block, or taking output from the switch block.



A DSP-resource-to-network-interface connection is referred to as a forward connection. In a forward connection, a network interface uses DSo streams for input and DSi streams for output. In the switch commands, the streams 0..7 are used to address the MVIP bus wires.



Connecting a network interface to another network interface connection is referred to as a reverse connection. Reverse connections are made to connect a call to an operator station or to connect a call to another phone line. Streams 8..15 are the same DSo and DSi wires. When connecting two network interfaces together, one network interface must drive DSo and receive input from DSi. This connection would use streams 8..15. 







5.4	 Using the MVIP-95 Switch Model





In the MVIP-90 switch model, the 16 MVIP data streams are addressed as streams 0..15, and local resources start at stream 16. The MVIP-95 switch model was created to accommodate more data streams. In the MVIP-95 switch model, telephony bus streams are addressed as streams 0..31. 



The MVIP-95 switch model can be used with both MVIP-90 and H.100 buses. The MVIP-95 model is based on the premise that a given stream number corresponds to the same physical wire on both sides of the switch block.



The terminus is used in MVIP-95 switching commands to define a specific point on the switch block. The terminus specifies a bus, stream, and timeslot.



The bus field in the terminus structure can be the MVIP bus, the Local bus, or the MC1 bus. The streams on each bus are numbered starting from 0.


 



Figure 14 shows the MVIP-95 switch model:


 



Figure 14.	 MVIP-95 Switch Model for AG-8 and AG-8/80 Boards



 




Figure 15 shows the MVIP-90 bus wires mapping to both switch models: 


 



Figure 15.	 MVIP-90 Bus in MVIP-90 and MVIP-95 Models



 




The following table shows the correspondence between the MVIP-90 physical bus wires, the MVIP-90 switch model stream names, and the MVIP-95 switch model stream names:


  





 MVIP-90 Bus Wire



 MVIP-90, input to switch block



 MVIP-90, output from switch block



 MVIP-95 




 DSo0



 0



 8



 0




 DSi0



 8



 0



 1




 DSo1



 1



 9



 2




 DSi1



 9



 1



 3




 DSo2



 2



 10



 4




 DSi2



 10



 2



 5




 DSo3



 3



 11



 6




 DSi3



 11



 3



 7




 DSo4



 4



 12



 8




 DSi4



 12



 4



 9




 DSo5



 5



 13



 10




 DSi5



 13



 5



 11




 DSo6



 6



 14



 12




 DSi6



 14



 6



 13




 DSo7



 7



 15



 14




 DSi7



 15



 7



 15




 N/A - used with H.100 bus only.



 16..23




 N/A - used with H.100 bus only.



 24..31
















By convention, streams are usually paired: even stream n is paired with odd stream n+1 (e.g., streams 0 and 1, streams 2 and 3, etc.). If stream 0 is configured as an input stream, stream 1 is typically configured as the corresponding output stream.



In the MVIP-90 switch model, even-numbered streams carry voice data and 
odd-numbered streams carry signaling data. The MVIP-95 switch model uses the following convention:




  • Signaling data is carried on stream pairs 4n+2 and 4n+3. For example:

    

      

    • Streams 2 and 3

      

      

    • Streams 6 and 7

      

      

    • Streams 10 and 11, etc.

      

      

      By convention, DSP resources send output to even numbered streams and receive input from odd numbered streams.
      


      To make a full-duplex connection between a DSP resource and a network interface on two different boards, connect:
      

      • 

      

      5.5	 Hybrids and Timeslots on the Local Bus
      

      


      On the AG-8 and AG-8/80 boards, each line interface hybrid is hardwired to a specific timeslot on the local bus. Each hybrid supports one port of telephone network connectivity. Each pair of hybrids is permanently connected to a RJ-61X connector (also called a jack). Each jack is therefore bound to the two corresponding timeslots on the local bus. Figure 16 shows the relationship between hybrids, timeslots, and jacks for AG-8 and AG-8/80 boards:
      

 
      


      Figure 16.	 Timeslots, Hybrids, and RJ-61X Connectors
      

      

      

      5.6	 Default Connections
      

      


      If MVIP connectivity is disabled in the AG configuration file (EnableMVIP=NO), the following default local connections are nailed up at board initialization:
      

  

      


      
 Switch Connection
      

      		
 MVIP-90
      

      		
 MVIP-95
      


      
 Full duplex connection between line interface voice information and DSP resources.
      

      		
 16:0..7 => 18:0..7
      18:0..7 => 16:0..7
      

      		
 local:0:0..7 => local:5:0..7
      local:4:0..7 => local:1:0..7
      


      
 Full duplex connection between line interface signaling information and DSP resources.
      

      		
 17:0..7 => 19:0..7
      19:0..7 => 17:0..7
      

      		
 local:2:0..7 => local:7:0..7
      local:6:0..7 => local:3:0..7
      



      


      

      

      

      

Note:  When MVIP connectivity is enabled, there is no default routing. You must control the routing using the CT Access Switching service. See the Switching Service Developer's Reference Manual for information about the CT Access Switching service API.

      

      

      5.7	 FMIC-Based Switching Restrictions
      

      


      Switching on the AG-8 and AG-8/80 boards is implemented by the FMIC chip, which was built for implementing MVIP-90 switching. The FMIC chip was designed to work in full duplex mode (allowing 256 full-duplex connections) rather than in a fully general 512-simplex-connection model. It has a direction bit in its connection memory for each timeslot. 
      


      An FMIC-based switch connection can:
      

      

      An FMIC-based switch connection cannot:
      

      

      For example, the following duplex connections are illegal:
      

      

      Figure 17 illustrates both kinds of illegal duplex connections in an FMIC-based system:
      

 
      


      Figure 17.	 Switch Connections in an FMIC-based MVIP-90 System
      

      

      An application can use simplex connections instead of a duplex connection, but arbitrary simplex connections may fail if the direction bit on the connection has already been set in the opposite direction.
      

      

      

      5.7.1	 Local Switching Restrictions
      

      


      An application cannot connect the DSP resources of an AG-8 board to the network interfaces of the same AG-8 board over the MVIP bus. Those connections must be made over the local connections on the FMIC (connect local streams 16 to 18 and 17 to 19 directly).
      


      There is no direction bit associated with local streams.
      

      

      

      5.8	 Multi-Chassis Switching
      

      


      Multi-chassis switching enables developers to build distributed systems for applications that do not fit in a single PC chassis. MC1 (MVIP Multi-Chassis) technology is similar to single-chassis MVIP but operates over a SCSI-3 cable of up to 15 meters. An MC1 system can contain up to 15 PC chassis; each PC chassis has an MC1 board and can connect to the MC1 bus to share data and resources with boards in other PC chassis. 
      


      Each chassis in a multi-chassis system contains telephony boards (including one MC1 board) connected to each other by an MVIP telephony bus. The MC1 board in each chassis switches data between the MVIP bus and the MC1 bus.
      


      Figure 18 shows the switching hierarchy in a multi-chassis system. Intra-board switching involves switching DSP resources and network interfaces on a single board. Inter-board switching is switching across multiple boards in a single PC chassis. Inter-chassis switching is switching across boards in multiple PC chassis.
      

 
      


      Figure 18.	 Multi-Chassis Switching Hierarchy 
      

      

      


      
 
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