(Page 1 of 1 in this chapter) Version

Chapter 4

Configuring TDM Bus Physical Interfaces

4.1 TDM Configuration Creation

: 4.1.1 T1/E1 Configuration Options
: 4.1.2 MVIP/H.100/H.110 Bus Timing Options
: 4.1.3 TDM Port Configuration

4.2 Configuration Binary File Generation

4.3 Configuration Download

If you use T1/E1 or MVIP/H.100/H.110 bus channels (also known as TDM channels) as the physical SS7 links, you must configure which streams/timeslots will carry the SS7 links. This requires the following steps: Create a text file describing your T1/E1 and/or MVIP/H.100/H.110 bus configuration (a sample configuration file is provided with the distribution software). Run the tdmcfg utility to create a binary TDM configuration file suitable for downloading to the TX board. Add a command to the download script to download the TDM configuration to the TX board (see Chapter 5).
These steps are described in the following subsections. Please note that each TX board in a system requires its own separate TDM configuration file.

4.1 TDM Configuration Creation

Dedicated data channels from the T1/E1/MVIP/H.100/H.110 interfaces are pre-configured by creating an off-line database and downloading it to the CPK kernel at download time. Off-line database creation consists of: creating the configuration text file, generating the configuration binary file, and loading the configuration (binary) file. Note: Each TX communications processor in a system must have its own separate dedicated data channel configuration database.
A text file (hereafter referred to as the tdmcfg.txt file) is prepared containing a description of each dedicated data channel: the "port" that it is assigned to, the T1/E1 or MVIP/H.100/H.110 stream that it occupies, the first timeslot on that stream that it occupies, the number of timeslots used, and the direction (described below). The tdmcfg.txt file also configures the clocking associated with the MVIP/H.100/H.110 bus interface as well as the configuration of the T1/E1 interfaces. The following shows a sample tdmcfg.txt file. Individual configuration fields are described in more detail below. # T1 Example # Timing Configurations: # CLOCK NETA SEC8K NONE # # TX Port MVIP Stream Start Channel Count Direction # ------- ----------- ------------- ----- --------- Port1 Stream0 Channel0 Count1 Standard Port2 Stream1 Channel0 Count56 Standard Port3 Stream2 Channel0 Count1 Standard Port4 T1A Channel0 Count1 Standard # # T1 Framing Encoding Buildout Robbed Bit Loop Master # -- ------- -------- -------- ---------- ----------- T1A D4 B7ZS 0 TRUE FALSE T1B ESF B8ZS 0 FALSE FALSE # E1 Example # Timing Configurations: # CLOCK NETA SEC8K NONE # # TX Port MVIP Stream Start Channel Count Direction # ------- ----------- ------------- ----- --------- Port1 Stream0 Channel0 Count1 Standard Port2 Stream1 Channel0 Count56 Standard Port3 Stream2 Channel0 Count1 Standard Port4 E1B Channel1 Count1 Standard # # E1 Framing Encoding Buildout Robbed Bit Loop Master # -- ------- -------- -------- ---------- ----------- E1A CAS HDB3 4 TRUE FALSE E1B CAS HDB3 4 FALSE FALSE

4.1.1 T1/E1 Configuration Options

The T1/E1 configuration line consists of an identifier indicating which circuit (A or B) is being configured followed by parameters specifying the Framing, Line Encoding, Line Buildout, Robbed Bit signaling, and Loop Master configuration for this circuit.
Framing Options - Determines the framing format to be used for this T1/E1 circuit.

None

Do not configure this T1/E1 circuit.

D4

[T1] D4 (193S) Framing

ESF

[T1] Extended Superframe Format

CCS

[E1] Frame alignment only. (No multiframe alignment)

CAS

[E1] Standard frame alignment with Channel Associated Signaling (timeslot 16) multiframe alignment (no CRC4).

CCSCRC4

[E1] Standard frame alignment with CRC4 multiframe alignment (no CAS).

CASCRC4

[E1] Standard frame alignment with both Channel Associated Signaling (timeslot 16) and CRC4 multiframe alignment.
Encoding Options - Determines line encoding and zero suppression mechanism to be used for this circuit.

NOZCS

[T1 or E1] AMI encoding with no zero code suppression.

B7ZS

[T1] Bit Seven Zero Stuffing.

B8ZS

[T1] Bipolar Eight Zero Substitution.

HDB3

[E1] High Density Bipolar (order 3) encoding.
Buildout Options - Determines line buildout to be used for this T1/E1 circuit.

T1

E1

0: 0-133 Feet

1: 133-266 Feet

4: 120 Ohm Normal With Protection Resistors [This value is the default for E1]

2: 266-399 Feet

3: 399-533 Feet

4: 533-655 Feet
Robbed Bit Flag - Set to TRUE or FALSE, indicates whether Robbed Bit Signaling is used by the TX board on this T1/E1 Circuit.
Loop Master Flag - Set to TRUE or FALSE, indicates whether this T1/E1 interface is the timing source for this circuit.

None	Do not configure this T1/E1 circuit.
`D4`	[T1] D4 (193S) Framing
`ESF`	[T1] Extended Superframe Format
`CCS`	[E1] Frame alignment only. (No multiframe alignment)
`CAS`	[E1] Standard frame alignment with Channel Associated Signaling (timeslot 16) multiframe alignment (no CRC4).
`CCSCRC4`	[E1] Standard frame alignment with CRC4 multiframe alignment (no CAS).
`CASCRC4`	[E1] Standard frame alignment with both Channel Associated Signaling (timeslot 16) and CRC4 multiframe alignment.

`NOZCS`	[T1 or E1] AMI encoding with no zero code suppression.
`B7ZS`	[T1] Bit Seven Zero Stuffing.
`B8ZS`	[T1] Bipolar Eight Zero Substitution.
`HDB3`	[E1] High Density Bipolar (order 3) encoding.

T1	E1
`0`: 0-133 Feet
`1`: 133-266 Feet
	`4`: 120 Ohm Normal With Protection Resistors [This value is the default for E1]
`2`: 266-399 Feet
`3`: 399-533 Feet
`4`: 533-655 Feet

4.1.2 MVIP/H.100/H.110 Bus Timing Options

A TX communications processor may either provide an MVIP, H.100, or H.110 TDM bus interface. This interface is general referred to as MVIP in the following example. The bus timing entry describes the clocking configuration for the MVIP bus clock signals (/C4, /F0, C2) and Secondary 8K clock signals. The clocking configuration statement syntax is:
CLOCK <Clock Mode>
SEC8K <Sec8k Mode>
where <Clock Mode> is one of the following values:

BUS The MVIP adapter gets its timing signals
from the MVIP bus.
MASTER The MVIP adapter drives the MVIP bus
clock signals from its internal clock.
SEC8K The MVIP adapter drives the MVIP bus
clock signals referenced from the MVIP Secondary 8K
signal.
NETA The MVIP adapter drives the MVIP bus
clock signals and derives this timing from T1 interface
A.
NETB The MVIP adapter drives the MVIP bus
clock signals and derives this timing from T1 interface
B.

and <Sec8k Mode> is one of the following values:

MASTER The MVIP adapter drives the SEC8K clock
signals from its internal clock.
NETA The MVIP adapter drives the SEC8K clock
signals and derives this timing from T1 interface A.
NETB The MVIP adapter drives the SEC8K clock
signals and derives this timing from T1 interface B.
NONE The SEC8K clock is not driven by the MVIP adapter.

If not specified, the default <Clock Mode> is BUS and the default
<Sec8k Mode> is NONE.

4.1.3 TDM Port Configuration

The channel definition entry describes the characteristics of each dedicated data channel. Channels are always defined as full-duplex connections. For the MVIP bus, stream n is always paired with stream n+8. For the H.100/H.110 bus, stream n is always paired with stream n+1. Field entries are:
Portn Identifies the port assigned to this data channel, where n is an integer in the range 1 £ n £ <maxPorts> and
<maxPorts> depends on the hardware
configuration. This port number is used when
configuring other TX communication
software products to utilize this data channel.
Streamn Identifies the MVIP stream that this channel
occupies.
MVIP Stream numbers are 0-7.
H.100/H.110 Stream numbers are 0-30 (even numbers only).
T1/E1 Streams are identified by name (T1A, E1A, T1B, E1B).
T1/E1 B Stream number is 18.
Channeln Refers to the starting channel number.
MVIP uses channel numbers 0-31.
H.100/H.110 uses channel numbers 0-127.
T1 uses channel numbers 0-23.
E1 uses channel numbers 1-31 (0 is used for framing).
Countn Identifies the number of timeslots that make
up this channel. The range is 1-32. A special case exists for a 56 Kb or a 48 Kb subrate on a single DSo. If count is set to 56 or 48, the indicated subrate is allocated.
Direction Identifies the direction of bus signals for
MVIP/H.100/H.110 channels.
Possible values are: STANDARD: MVIP H.100 Stream 0 DSo0 = input Stream 0 DSi0 = output (Stream 1) Stream 1 DSo1 = input Stream 2 DSi1 = output (Stream 3) REVERSE: MVIP H.100 Stream 0 DSo0 = output Stream 0 DSi0 = input (Stream 1) Stream 1 DSo0 = output Stream 2 DSi1 = input (Stream 3) Note: Reverse is only applicable to MVIP/H.100/H.110 channels; T1/E1 channels should always be specified as Standard.

4.2 Configuration Binary File Generation

The configuration binary file is generated by running the configuration utility on this file. This is done with the command: tdmcfg -i <input file name>
The TDM Configuration utility will generate 2 files:
<filename>.bin binary configuration file
<filename>.dbg text representation of the above binary file

4.3 Configuration Download

The configuration is downloaded using the standard cplot utility with the -g option. cplot -g TDM -f <tdmcfg binary file name> [-c <board number> ]
This must be downloaded before any tasks which might attempt to use the specified data channels. Note: The TX board must have been previously loaded or reset (PCI boards) before performing this action.

(Page 1 of 1 in this chapter) Version

tech_support@nmss.com