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Appendix A

MVIP Switching Model

: Software Model of the Switch Fabric
: Dedicated Data Channel Configuration

Software Model of the Switch Fabric

The MVIP manager presents a switching model to the host PC that is compliant with the MVIP-90 specification. Stream naming conventions for the MVIP bus streams and T1/E1 interface streams are shown in Figure 7.
Streams 0 through 7 correspond to MVIP bus streams DSi/o0 through DSi/o7, with MVIP bus streams DSo0 through DSo7 set as inputs to the TX board switch and MVIP streams DSi0 through DSi7 set as outputs. Connections through the switch fabric utilizing MVIP streams DSo0 through DSo7 as input and DSi0 through DSi7 as output are called forward connections. Figure 7. Software Model of TX Switch Fabric
This section presents the MVIP-90 switch model. For H.the 100/H.110 model, there is no concept of adding eight to specify a reverse connection. The H.100/H.110 convention is to pair sequential odd and even stream numbers.
In order to support reverse connections, the TX switching model also supports input streams 8 through 15, which correspond to MVIP bus streams DSi0 through DSi7 being utilized as inputs to the switch fabric. Likewise, output streams 8 through 15 correspond to MVIP bus streams DSo0 through DSo7 being utilized as outputs from the switch fabric. Setting up a connection between two TX boards across the MVIP bus requires a forward connection on one board and a reverse connection on the other board as shown in Figure 8. Figure 8. Forward and reverse Connections
While the TX switch fabric can support any MVIP stream/time slot as an input and any MVIP stream/time slot as an output, there are always 256 full-duplex MVIP channels. Whenever a particular MVIP DSo or DSi channel is programmed as an input, the corresponding DSi or DSo channel is automatically configured as an output. For example, when stream DSo1 (input stream 1) time slot 3 is programmed as an input, stream DSi1 (output stream 1) time slot 3 is automatically configured as an output. Attempting to use input stream 9, time slot 3, which also refers to MVIP bus stream DSi1 time slot 3 (but as an input) results in an error.
Streams 16 and 18 (for MVIP-90) and streams 40 and 41 (for H.100/H.110) refer to the streams from T1/E1 interfaces A and B, respectively (local data streams LD1 and LD3). Unlike the MVIP bus streams, T1/E1 streams do not switch direction of the input output pins, so there is no concept of reverse connections (when configuring dedicated data channels on T1/E1 streams, the direction should always be specified as forward).
Additional input/output streams refer to the on-board local data streams, which are used internally to connect dedicated data channels to 68360 SCCs for protocol processing. These streams are used solely by the TX kernel and are not valid for switching requests from the application.

Dedicated Data Channel Configuration

Dedicated data channels from both the MVIP and T1/E1 interfaces are pre-configured by creating an off-line database (called the TDM configuration file) and downloading it to the TX CPK kernel at download time. The TDM configuration file also specifies the MVIP clocking configuration for the board as well as the characteristics (framing, line coding, etc.) of any T1 or E1 interfaces on the board. Note: Each TX board in a system must have its own separate TDM configuration database.

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