(Page 1 of 1 in this chapter)


A

a2usadd6.slc 48
a2usadd9.slc 48
a2usals6.slc 47
a2usals9.slc 47
a2usalsn.slc 47
a2usasl6.slc 48
a2usasl9.slc 48
ADI service 8
adsir(_j).m54 36
adsix(_j).m54 36
AG configuration file
ag2000.cfg 33
assigning a board number 34
categories 33
creating an 33-36, 38-43, 45-46
DSP files 36-37
keywords related to the AG 2000 30-32
leo files 38
purpose 9
running agmon 49
sample 50-53
verification procedure 56, 58
ag.cfg 9, 30-32, 50-53
ag.rpt 49, 59
ag2000.cfg 33
AG2DSP_Lib keyword 30
AG2DSP_Loader keyword 30
AG2DSP_OS keyword 30
AG2DSPFile keyword 31
AG2DSPImage keyword 30
AG2TaskProcessor keyword 31
agerror.log 49, 59
agmon 9, 30, 33, 49, 59, 139
A-law 37

B

backup reference clock 40
blocate 34-35, 58, 138-139
Board keyword 31
board locate utility 34-35, 58, 138-139
board number 34
boardinf 60
bus
termination 17-18
bus clock
master 39
slave 39

C

call processing 3
call progress 36
callp.m54 36
channels
receive 5
transmit 5
cleardown detector 36
clock
establishing 39-40
master 39
MC1 system 39
signals 39
slave 39
ClockRef keyword 31, 39-40, 58
compliance 126
configuration parameters 80-87
connectors 26
CT Access 7-8, 15-16, 118
CT_NETREF 40
ctaerr.h 81
ctatest
DID 64-65
loop start 68-69
MVIP connectivity 69
overview 61
subscriber loop 66-67

D

demonstration programs, summary of 70
developer support vii
development test port connector 133-135
Diagnostics keyword 31
DID
board types 2
compliance 127
connectors 26
ctatest 64-65
LEDs 57, 119
overview 6
pinouts 26
power supply 22
QSLAC files 48
receive signaling 116
specifications 129-130
TCPs 48
timeslot association 88-91
transmit signaling 115
voltage requirements 122
did0.tcp 48
did1.tcp 48
DIP switch 18, 124
DSP
files 8, 36-37
resources 3, 37, 61, 70, 118
DTMF detection 36
dtmf.m54 36
dtmfe.m54 36

E

echo cancellation 36, 41
echo.m54 36
EnableMVIP keyword 31, 38-39, 61, 70, 77
environment 125
errors, capturing 59

F

fax 3

G

g726.m54 36
gtp.leo 38

H

H.100 bus
configuration 17
connectivity 3, 16, 38
installing with an AG 2000 board 19
number of boards 21
specification 10
stream configurations 3
streams 73
termination 17-18, 124
H.100 connectivity 70
high batt 57, 119, 122
HMIC 4, 75
H-MVIP
standard 10

I

IdleCode keyword 31
ima.m54 36
impedance 131
incta 70
installation
configuring the hardware 17-18
connecting to the network 25-27
DID power supply 22
procedure 19-21
subscriber loop power supply 23-24
summary of 15
system requirements 16
verification 56-70
interrupt 35
ISA boards 35

L

LEDs 56-58, 120
leo files 38
line gain
obtaining 82-84
setting 85-87
line interface signaling module 5-6, 26, 76, 88-91, 108-116, 129-130
line splitter cable 27
loadable extensible object (leo) file 38
LoadFile keyword 31
local streams 73
loop start
AG configuration example 50-51
board types 2
Class B upgrade 127
compliance 126
connectors 26
ctatest 68-69
LEDs 57, 119
line interfaces 6
loop current detection 110
overview 6
pinouts 26
QSLAC files 47
receive signaling 110-111
releasing the line 109
ring detection 110
seizing the line 109
specifications 129-130
TCPs 47
timeslot association 88-91
transmit signaling 109
voltage requirements 122
low batt 57, 119, 122
lps0.tcp 47

M

MC1 system 39
memory requirements 16
MF detector 36
mf.m54 36
mu-law 37
MVIP Bus Adapter 11-12, 16-17, 19-21
MVIP connectivity 61, 69
MVIP-90
clocking 39
compatibility 38
interoperability 11-12
standard 10
MVIP-90 bus
connecting to 20-21
number of boards 21
MVIP-95
standard 10
mvip95.h 80

N

network reference clock 40
NMS ADPCM encoding 37
NMS_ANALOG_INTERFACE_TYPE_PARMS 88
NMS_INTERFACE_SIGNALING_MODULE 89
NMS_LINE_GAIN_PARMS 83, 85
nmshw.h 80
nocc.tcp 47-48

O

OKI speech encoding 37
oki.m54 37
outcta 70

P

pan-European approval 27
PCI boards 35
PCI bus
board number 34
connectivity 3
connector 19
interrupt 35
location 34-35
slot 10
PCIbus keyword 31
PCIslot keyword 31
pinouts 26
power connector
external 121-122
internal 123
power requirements 125
power supply
DID 22
subscriber loop 23-24
protocols 8
prt2prt 70
ptf.m54 36
pulse functions 37

Q

QSLAC 42-48, 131
Qslac keyword 32

R

receive channel 5
receive signaling
DID 116
loop start 110-111
subscriber loop 114
ReportFile keyword 32
ring detection 37, 110
ring voltage 122
runfile 8
RunFile keyword 32
RunModule keyword 32
runtime software 8
rvoice.m54 37

S

signal.m54 37
signaling 8, 37, 108-116
sta0.tcp 48
subscriber loop
board types 2
compliance 127
connectors 26
ctatest 66-67
LEDs 57, 119
overview 6
pinouts 26
power supply 23-24, 132
QSLAC files 48
receive signaling 114
specifications 129-130
TCPs 48
timeslot association 88-91
transmit signaling 112-113
voltage requirements 122
svc.leo 38
SWI_LOCALTIMESLOT_ARGS 88
swiConfigLocalTimeslot 80-81, 85
swiConfigLocalTimeslotInfo 81
swidef.h 80-81
swiGetLocalTimeslotInfo 80, 82-83, 88
swish 61-63, 69-70
switch model 73-74
switching 4, 38, 73-76
Switching service 8, 38, 42, 70, 80-81
system BIOS 35
system requirements 16

T

TCP 7-9, 46-48
TCP keyword 32
telephony standards 10
test port connector 133-135
timeslot, identifying line interface type 88-91
tone detection 36
tone generation 37
tone.m54 37
transmit channel 5
transmit signaling
DID 115
loop start 109
subscriber loop 112-113
trunk control program 7-9, 46-48

U

UNIX 33, 49
utilities
blocate 34-35, 58, 138-139
swish 61-63, 70

V

vceplay 70
vcerec 70
voice processing 3
voice.leo 38
voice.m54 37
voltage requirements, external power connector 122

W

WAVE files 37
wave.m54 37
Windows NT 33, 49


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