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Appendix B

Hardware Specifications

General

Board Capacity

· TX 3220 T: 2 T1 (DSX-1) termination
· TX 3220 E: 2 CEPT E1 termination

TDM Bus

Features one complete H.100 bus interface and optional MVIP-90 interface.

Microprocessor

One 66 MHz Motorola 68060 processor

Communication Processors

Four 33 MHz Motorola 68360 Quad Integrated Communication Controllers (QUICC)

Software Requirements

TX Base/Device Driver 4.1 Build 7 or later for Windows NT or Solaris x86

Host Interface

Electrical

PCI bus designed to PCI local bus specification revision 2.1

Mechanical

Designed to PCI local bus spec revision 2.1 for a long expansion card (physical dimensions 4.2 x 12.283 in)

Bus Speed

DC to 33 MHz

Max No. Boards per Chassis

6

Max No. SS7 Links per Board

16

I/O Mapped Memory

Memory mapped interface for efficient block data transfers

Addresses/Interrupts

Address and interrupts automatically configured by PCI BIOS (no jumpers or switches)

H.100 Compliant Interface

· Flexible connectivity between T1/E1 trunks and H.100 bus
· Switchable access to any of 4096 H.100 timeslots
· Compatible with any H.100, H-MVIP or MVIP-90 compliant telephony interface
· H.100 bus termination capability (switch enabled)

Environment

Operating Temperature

0 to 50 degC

Storage Temperature

-20 to 70 degC

Humidity

5 to 80%, non-condensing

Power Requirements

Max 0.25 Amps per board @ +12 V on PCI bus
Max 4.0 Amps per board @ +5 V on PCI bus

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