(Page 1 of 1 in this chapter) Version


Appendix B

Hardware Specifications


General

TDM Bus

Features one complete H.110 bus interface

Microprocessor

One 66 MHz Motorola 68060 processor

Communication Controllers

Four 33 MHz Motorola 68360 Quad Integrated Communication Controllers (QUICC)

Software Requirements

TX Base/Device Driver 4.1 Build 7 or later for Windows NT or Solaris x86


 
Host Interface

Electrical

CompactPCI bus designed to CompactPCI PICMG 2.0 specification revision 2.1

Mechanical

Designed to CompactPCI PICMG 2.0 specification revision 2.1 for 6U style cards

Bus Speed

DC to 33 MHz

Max No. Boards per Chassis

6

Max No. Ports per Chassis

16

I/O Mapped Memory

Memory mapped interface for efficient block data transfers.

Addresses/Interrupts

Address and interrupts automatically configured by CompactPCI BIOS (no jumpers or switches)

H.110 Compliant Interface

Flexible connectivity between T1/E1 trunks and H.110 bus

Switchable access to any of 4096 H.110 timeslots

H.110 clock master or clock slave (software selectable)

Compatible with any H.110

Environment

Operating Temperature

0 to 50 degC

Storage Temperature

-20 to 70 degC

Humidity

5 to 80%, non-condensing

Power Requirements

+12 V or -12 V is not required.



(Page 1 of 1 in this chapter) Version


tech_support@nmss.com
Copyright © 1999, Natural MicroSystems, Inc. All rights reserved.