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Chapter 5

MVIP Connectivity

5.1 Introduction

5.2 Trunk Channels and MVIP Timeslots

: 5.2.1 E1 Channels and MVIP Timeslots

5.3 Switch Models

: 5.3.1 MVIP-95 Switch Model
: 5.3.2 MVIP-90 Switch Model

5.4 Switching Matrix Restrictions

: 5.4.1 Practical Outcomes of the Switching Matrix Chip Limitation

5.1 Introduction

This chapter: Describes how trunk channels interface with MVIP timeslots on BX 3000 boards. Describes the BX 3000 MVIP switch model. Describes how trunk channels are automatically routed to processing resources if MVIP switching is not enabled. Explains how you can change this default routing by enabling MVIP switching.

5.2 Trunk Channels and MVIP Timeslots

When the trunk transmission reaches the BX 3000 board, the board places the voice and signaling information directly in timeslots in MVIP streams.

5.2.1 E1 Channels and MVIP Timeslots

The BX 3000-1E routes voice information as follows: E1 timeslots 1 through 15 are assigned to MVIP-95 Local,0,0..14 and Local,1,0..14 (MVIP-90 stream:timeslot 16:0..14). E1 timeslots 17 through 31 are assigned to MVIP-95 Local,0,15..29 and Local,1,15..29 (MVIP-90 stream:timeslot 16:15..29).
Figure 16 illustrates how voice channel data is assigned to MVIP timeslots: Figure 16. Connecting E1 B Channels To MVIP Timeslots
Signaling information is routed in the standard E1 common channel signaling (CCS) configuration, where CCS signaling packets are transmitted in channel 16. All signaling information from channel 16 is routed to MVIP-95 Local,2,16 and Local,3,16 (MVIP-90 stream:timeslot 17:16) (See Figure 17.) This stream connects to the board's HDLC controller, which processes the D channel information from each frame. Figure 17. Routing E1 Channel 16 Data To HDLC Controller
There are default connections that are made. The HDLC controller is connected to the D channel of the corresponding trunk. Timeslots 0 to 29 of each trunk are set to the silence value of 0x54 and are sent on the network as 0x2A because characters transmitted on the network are transmitted as bit reversed.
The HDLC cannot be accessed directly. They are not displayed either in showconx or in showcx95.
The ResetSwitch command that can be issued via swish or with swiResetSwitch temporarily disconnects the HDLC. Some messages could be lost before the HDLC is automatically reconnected.

5.3 Switch Models

This section describes how the BX 3000 trunk streams fit in the context of BX 3000 MVIP switch model. For more information about MVIP switch models, see Getting Started With MVIP Switching.

5.3.1 MVIP-95 Switch Model

Figure 30 shows the BX 3000-2E switch model in MVIP-95 terms. The specific use of each MVIP stream is as follows: Local streams 0 and 1 are connected to the trunk. They carry voice information. Timeslots 0 through 29 are used (corresponding to the 30 data channels). Local streams 2 and 3 are connected to the HDLC controller chip. This controller processes the D channel information from each E1 frame. (BX 3000-2E only) Local streams 4 and 5 are connected to the second trunk. They carry voice information. Timeslots 0 through 29 are used (corresponding to the 30 data channels). (BX 3000-2E only) Local streams 6 and 7 are connected to a second HDLC controller chip. This controller processes the D channel information from each E1 frame. Figure 18. BX 3000-2E Switch Model (MVIP-95)

5.3.2 MVIP-90 Switch Model

Figure 31 shows the BX 3000-2E switch model in MVIP-90 terms. The specific use of each MVIP stream is as follows: Stream 16 is connected to the first trunk. It carries voice information. The timeslots 0 through 29 are used (corresponding to the 30 data channels). Stream 17, timeslot 16 is connected to the HDLC controller. This controller processes the D channel information from each E1 frame. (BX 3000-2E only) Stream 18 is connected to the second trunk. It carries voice information. Timeslots 0 through 29 are used (corresponding to the 30 data channels). (BX 3000-2E only) Stream 19, timeslot 16, is connected to a second HDLC controller. This controller processes the D channel information from each E1 frame. Figure 19. BX 3000-2E MVIP Switch Model (MVIP-90)

5.4 Switching Matrix Restrictions

The MVIP-90 Switching Standard is designed to use full duplex streams. When making a full duplex connection using stream 0, the timeslot on DSo0 is used to receive input, and output is driven onto the same timeslot on DSi0. For example:

MakeConnection ( 0:3 to 16:6 ) /* connects DSo0:3 to local stream 16:6 */ MakeConnection ( 16:6 to 0:3 ) /* connects local stream 16:6 to DSi0:3 */
The Switching Matrix chip on the BX 3000 board was built for implementing MVIP-90 switching. It has a "direction" bit in its connection memory for each timeslot that selects either of the following modes: Send output to a timeslot on a DSi stream and receive input from the same timeslot on the corresponding DSo; or Receive input from a timeslot on a DSi and send output to the same timeslot on the corresponding DSo.
The Switching Matrix chip cannot simultaneously send output to both DSi and DSo on the same timeslot on the same-numbered stream, and also cannot simultaneously receive input from both DSi and DSo on the same timeslot. Note that this restriction exists for MVIP timeslots only: local timeslots have no direction associated with them.
Thus if the following MVIP-90 simplex connection is made: MakeConnection ( 0:3 to 16:6 ) /* connects DSo0:3 to local stream 16:6 */
...then the chip establishes DSo0:3 as an input timeslot, and also establishes DSi0:3 as an output timeslot. Even though there are no switch connections made to DSi0:3, the switch block cannot receive input from DSi0:3 because the direction is currently set to "output" for that timeslot in the chip. Thus a connection such as the following would cause an error: MakeConnection ( 8:3 to 18:6 ) /* connects DSi0:3 to local stream 18:6 */
...since this connection attempts to receive input from DSi0:3.
Here is the same duplex connection as the one shown above, in MVIP-95 terms: MakeConnection (mvip:0:3 to local:1:6) /* connects DSo0:3 to local stream 1:6 */ MakeConnection (local:0:6 to mvip:1:3) /* connects local stream 0:6 to DSi0:3 */
When a connection is made using stream 0 timeslot 3, the direction is set for timeslot 3 on stream 1. Stream 0 corresponds to DSo0, and stream 1 corresponds to DSi0. Thus a connection like the following would cause an error: MakeConnection (mvip:1:3 to local:5:2) /* connects DSi0:3 to local stream 5:2*/
The "direction" bit for a timeslot may not be changed until all connections involving the timeslot have been broken. At that point, the next connection involving that timeslot resets its "direction" bit to a new direction.

5.4.1 Practical Outcomes of the Switching Matrix Chip Limitation

In most applications, this switching restriction is completely invisible. However, you cannot connect the local resources of a BX 3000 over the MVIP bus. Those connections must be made locally on the Switching Matrix chip. Local timeslots have no direction associated with them.
For example, with a BX 3000, you cannot connect DPNSS channel 0 to channel 1 over the MVIP bus, as shown here (in MVIP-90 terms): MakeConnection ( 16:0 to 0:0 duplex ) /* connects line interface 0 to DSo0:0 */ MakeConnection ( 8:0 to 16:1 duplex ) /* connects DSi0:0 to line interface 1 */
...since the first connection sets the direction bit for DSo0:0 to "output," and also sets the bit for DSi0:0 to "input". The second connection attempts to receive input from DSi0:0, which is now illegal. The correct way to connect DPNSS channel 0 to channel 1 would be locally, as shown here:

MVIP90: MakeConnection (16:0 to 16:1 duplex) MVIP95: MakeConnection (local:0:0 to local:1:1) MakeConnection (local:0:1 to local:1:0)
If a connection is unavailable because the direction bit for the timeslot is set oppositely, the MVIP switching driver returns error code MVIP_NO_PATH.

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