Appendix B

Hardware Specifications

General

TDM Bus	Features one complete H.110 bus interface with MVIP-95 enhanced-compliant switching
DSP Processing Power	16, 32, or 48 TMS320C549 DSPs at 100 MIPS each.
Microprocessor	One 100 MHz 80486 compatible embedded processor
Software Development Kits	Natural Access for Windows NT, UnixWare, and Solaris

Protocols

Host Interface

Feature	Specification
Electrical	CompactPCI bus designed to CompactPCI PICMG specification revision 2.1
Mechanical	Designed to the CompactPCI PICMG specification revision 2.1 for 6U style cards
Bus Speed	DC to 33 MHz
Maximum Number of Boards per Chassis	3 - 14
Maximum Number of Ports per Chassis	Limited by host processor resources
I/O Mapped Memory	Memory mapped interface for efficient block data transfers
Addresses/Interrupts	Address and interrupts automatically configured by CompactPCI BIOS (no jumpers or switches)

H.110 Compliant Interface

Environment

Feature	Description
Operating Temperature	0 to 50 degC
Storage Temperature	-20 to 70 degC
Humidity	5 to 80%, non-condensing

Power Requirements for AG 4000C/1600

State	Requirement
BD_SEL# Inactive/AG 4000C Inactive	230 mA maximum @ +5 V 107 mA maximum @ +3.3 V
BD_SEL# Active/AG 4000C in Reset	900 mA maximum @ +5 V 280 mA maximum @ 3.3 V
BD_SEL# Active/AG 4000C Active	1.5 A maximum @ 5 V 1.5 A @ 3.3 V

Power Requirements for AG 4000C/3200

State	Requirement
BD_SEL# Inactive/AG 4000C Inactive	230 mA maximum @ +5 V 107 mA maximum @ +3.3 V
BD_SEL# Active/AG 4000C in Reset	1.2 mA maximum @ +5 V 600 mA maximum @ 3.3 V
BD_SEL# Active/AG 4000C Active	1.6 A maximum @ 5 V 2.0 A @ 3.3 V

Power Requirements for AG 4000C/4800

State	Requirement
BD_SEL# Inactive/AG 4000C Inactive	230 mA maximum @ +5 V 107 mA maximum @ +3.3 V
BD_SEL# Active/AG 4000C in Reset	1.4 mA maximum @ +5 V 800 mA maximum @ 3.3 V
BD_SEL# Active/AG 4000C Active	1.8 A maximum @ 5 V 2.4 A @ 3.3 V

CEPT E1 G.703 Telephony Interface

Interface	G.703 2048 Kbps trunk interface
Framing	CEPT G.703/G.704 Channel Associated Signaling
Insertion and Extraction	ABCD bits for Channel Associated Signaling and HDLC/LAPD for generating/terminating data link
Line Code	HDB3 or AMI (in zero code suppression)
Zero Bits	Selectable B8ZS, jammed bit (ZCS) or no zero code suppression
Alarm Signal Capabilities	Loss of Frame Alignment (OOF), Loss of Signaling Multiframe Alignment and Loss of CRC Multiframe Alignment (red), Remote Alarm and Remote Multiframe Alarm (yellow), Alarm Indication Signal (AIS) (blue)
Counts	Bit error rate, CRC errors, slips, line code violations, far-end block errors
Loopback	Per channel and across channels under software control
Connectors	Up to four 75 ohm RJ48C with BNC adapter cables or up to four 120 ohm RJ48C connectors

DSX-1 Telephony Interface

Interface	ANSI T1.102, T1.403
Framing	D4, ESF
Insertion and Extraction	ABCD bits
Line Code	AMI
Zero bits	Selectable B8ZS, jammed bit (ZCS) or no zero code suppression
Alarm Signal Capabilities	Yellow, Red, and Blue
Counts	Bipolar violation, F(t) error, and CRC error
Robbed bit	Selectable on a per-trunk basis
Loopback	Per channel and overall under software control. Automatic remote loopback with CSU option.
Connectors	Up to four RJ48C connectors

Compliance and Regulatory Certification