2.1 Introduction

2.2 Hot Swap Overview

2.2.1 Hot Swap EMC

2.2.2 Hot Swap Platform Requirements

2.3 Setting Up Hot Swap

2.3.1 Making Sure a Chassis Supports Hot Swap

2.3.2 Setting Up Your Chassis for Hot Swap

PCI Bus Segments and Space Windows

Using Leftover Allocated Space

2.4 Determining Bus and Slot Locations

2.5 Configuring the H.100 or H.110 Bus Clock

2.5.1 Clock Management EMC

2.1 Introduction

This chapter provides a general description of how to set up your system so that:

• The maximum number of slots are available for Hot Swap.

• A CT bus clock is properly configured to synchronize communications between boards.

For specifics on configuring a particular board type, refer to the board's documentation.

2.2 Hot Swap Overview

Hot Swap functionality is an integral part of OAM. Hot Swap is designed for use with CompactPCI Hot Swap-compliant boards. These boards contain a switch built into the ejector handle and a front panel Hot Swap LED. Upon insertion, the switch signals that the board is fully seated (with the handle closed) and that software connection can be initiated. Upon extraction, the switch signals that the operator is beginning to extract the board and that software disconnection should be initiated.

When lit, the Hot Swap LED informs the operator that software disconnection is complete and extraction is permitted. The operator can open the handle the rest of the way, ejecting the board.

The PCI interface for NMS Hot Swap-compatible CompactPCI boards includes the Hot Swap Control/ Status Register (HS_CSR). The PCI interface is responsible for management of the ejector handle switches and the Hot Swap LED. This interface also supports control of the hardware connection process for a High Availability system.

Figure 6 shows the ejector handles and Hot Swap LED on a CompactPCI AG Quad board.

Figure 6. CompactPCI AG Quad Board

2.2.1 Hot Swap EMC

Hot Swap is implemented as an extended management component (EMC). The OAM Hot Swap EMC can be configured to:

• Automatically prepare a board to be physically removed from the chassis

• Automatically start a board when it is physically installed in the chassis (if supported)

• Make alerts and other messages related to Hot Swap available to client applications

The Hot Swap EMC communicates with the Hot Swap Manager and driver to perform Hot Swap operations. The Hot Swap Manager and driver must be started in order for Hot Swap operations to work. To learn how to start these components, refer to Chapter 4.

Note: Hot Swap is supported only with CompactPCI boards. Some CompactPCI boards do not support Hot Swap. To determine if a board model supports Hot Swap, refer to the documentation for the board. Note that removing a non-Hot Swap-compatible board while the system is running may cause serious damage to the board and to the system.

2.2.2 Hot Swap Platform Requirements

Hot Swap development requires an Intel or SPARC CompactPCI-compliant platform that conforms to the following specifications:

• PICMG 2.0 Revision 2.1 CompactPCI

• PICMG 2.1 Revision 1.0 CompactPCI Hot Swap (either Hot Swap or High Availability platform)

• PCI BIOS Revision 2.1 (PCI BIOS services are used to manage interrupt assignments for hot-inserted boards.)

• PICMG 2.5 Revision 1.0 CompactPCI Computer Telephony (If the H.110 bus is not present, the CompactPCI board will not power up.)

2.3 Setting Up Hot Swap

The following sections describe how to determine if a chassis supports Hot Swap, and make sure that adequate address space is configured for the boards.

2.3.1 Making Sure a Chassis Supports Hot Swap

To determine if a chassis is compatible with Hot Swap, run the biostest utility, as follows:

1. Start biostest by entering: biostest

2. Verify that the next line in the display is:
   THIS SYSTEM IS HOT SWAP COMPATIBLE

For more details on biostest, see Chapter 8.

2.3.2 Setting Up Your Chassis for Hot Swap

In order to allow hot-swapping of boards in your CompactPCI system, adequate address space must be preconfigured. To maximize the number of slots available for hot-swapping, you should:

• Have all slots populated at boot time, or

• Have no slots populated at boot time.

This section describes how space is allocated for hot-swapping.

PCI Bus Segments and Space Windows

The PCI architecture allows a system to include a tree of PCI buses. Most CompactPCI systems have at least two PCI bus segments: one on the processor board and one (or more) dedicated to CompactPCI slots. There is at least one bus segment per 8 CompactPCI slots. These buses are connected by PCI-to-PCI bridges. (See Figure 7.)

Figure 7. PCI Bus Slots and Segments

Each device requires a certain amount of address space on the bridges. At boot time, the system BIOS configures address space "windows" on each bridge to define the range of addresses (that is, the bus number or memory address) that are allocated behind that bridge. (See Figure 8.)

Figure 8. Segments and Allocated Address Space on Bridge

Boards can only be hot-inserted into slots for which memory has been preallocated. Memory is usually allocated as follows:

• If any devices are physically installed at boot time, the bridge windows are initialized to be just big enough to span the address spaces that have been allocated to these devices behind the bridge. In this case, boards can only be hot-inserted into slots that were populated at boot time. (This is true unless the boards can fit into leftover allocated space, as described in the following section.)

• If no devices are physically installed at boot time, a single large bridge window is initialized that can accommodate any number of boards that can fit into it. This window is 16 MB under Windows NT; 64 MB under UNIX.

Thus to maximize the number of slots available for hot-swapping, you should have all slots populated at boot time; or have no slots populated at boot time.

Using Leftover Allocated Space

Usually, each address space window cannot be less than 1 MB in size. If allocations to boards behind the bridge do not add up to an integral number of megabytes, some fraction of a megabyte will be available in the window and unallocated. This unallocated space is then available for insertion of additional boards whose address space requirements are small enough. For example, if a board requires two 128K memory regions, and a CompactPCI bus segment contains only one of these boards at boot time, hot-insertion of up to 3 additional boards into that segment can be accommodated (see Figure 9).

Figure 9. Bus with 256K Board Inserted

However, if an 8-slot segment has 4 slots occupied at boot time with the boards, no more boards can be hot-inserted into that segment, because 4 boards occupy exactly one megabyte of address space. (See Figure 10.)

Figure 10. Bus with Four 256K Boards Inserted

Some boards (such as the CG 6000C board) have an address space requirement of two 1 MB memory regions. Since this requirement exactly matches the 1 MB granularity, you cannot add more of these boards than were present at start-up without rebooting. (See Figure 11.)

Figure 11. Bus with CG 6000C Board Inserted

The biostest utility (described in Chapter 8) reports on each PCI-to-PCI bridge in a system and its memory window assignment (if any).

2.4 Determining Bus and Slot Locations

The utility pciscan displays the logical CompactPCI or PCI bus and slot information for each NMS board installed in the system. To determine the bus and slot numbers for each board:

1. Insert a CompactPCI board into an unidentified slot.

2. Run pciscan by entering: pciscan
   The pciscan output will be similar to the following:
   Bus Slot NMS ID
   --- ---- ------
   2 11 0x50d AG CPCI Quad T1
   2 13 0x6000 CG 6000
   2 14 0
   --- ---- -- ----------------
   There were 3 NMS PCI board(s) detected

3. Record the CompactPCI bus and slot numbers.

4. Repeat steps 1 to 3 for each bus slot.

pciscan may also be used to flash an LED on a specific board. See Chapter 8 for complete details on pciscan.

A chart like the following is useful when mapping out the CompactPCI chassis:

Figure 12. CompactPCI Chassis Mapping

2.5 Configuring the H.100 or H.110 Bus Clock

If your boards are connected to each other on the H.100 or H.110 bus, a bus clock must be set up to synchronize communications between the boards connected to the bus. In addition, to provide redundant and fault-tolerant clocking between devices on the bus, alternative (fallback) clock sources can be configured to provide the clock signal if the primary source fails.

To configure the bus clock for your system:

• Configure a board to act as clock master, driving the bus clock.

• (Optional) Configure another board to act as secondary clock master, driving the clock if the primary clock master fails.

• Configure primary and secondary timing references for each clock master board. The timing reference for a board is an external signal from which it can derive a clock pulse.

• Configure all other boards as clock slaves, so they synchronize to the clock master signal.

To configure a board, modify the clocking keywords in the board's managed object. For a general introduction to clocking, see Appendix A. For specifics on setting up clocking for your boards, refer to your board documentation.

2.5.1 Clock Management EMC

The OAM service provides H.100 and H.110 bus clock management services to boards in a chassis that are connected through the bus. This functionality is provided in the Clock Management EMC.

When the boards are started, the Clock Management EMC:

• Configures the clock on each board as specified in the OAM database.

• Makes sure that the bus clock master board (the board driving the clock) is running before any clock slave boards start up.